Z16FMC64AG20SG Zilog, Z16FMC64AG20SG Datasheet - Page 57

• Manufacturer Part Number: Z16FMC64AG20SG
• Description: Microcontrollers (MCU) 16BIT 64K FL 4K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC64AG20SG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: 0 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / Rohs Status: Details

Reset Status and Control Register
Table 9. Reset Status and Control Register (RSTSCR)
Table 10. Reset Status Register Values Following Reset
PS028702-1210
Bits
Field
RESET
R/W
ADDR
The USER_RST bit in this register allows a software-controlled RESET of the part pin. It is a Write-only bit
that causes a System Reset, with the result identified by the USR bit after being executed.
0 = No action.
1 = Causes System Reset.
Reset or Stop Mode Recovery Event
Power-on reset
Reset using RESET pin assertion
Reset using WDT timeout
Reset from Fault detect logic
Stop Mode Recovery using GPIO pin transition
Stop Mode Recovery using WDT timeout
Reset using software control – write 1 to bit 0 of this reg-
ister
POR
R
7
The Reset Status and Control Register (RSTSCR, Table 9) records the cause of the most
recent RESET or Stop Mode Recovery. All status bits are updated on each RESET or Stop
Mode Recovery event. Table 10 indicates the possible states of the Reset status bits fol-
lowing a RESET or Stop Mode Recovery event.
STOP
R
6
See Table 10
WDT
R
5
P R E L I M I N A R Y
EXT
R
4
FF_E050H
POR
FLT
1
0
0
0
0
0
0
R
3
Z16FMC Series Motor Control MCUs
STOP
0
0
0
0
1
1
0
USR
R
2
Reset and Stop Mode Recovery
WDT
0
0
0
0
1
1
0
Reserved
Product Specification
R
EXT
1
0
1
0
0
0
0
0
FLT
USER_RST
0
0
0
1
0
0
0
W
0
USR
0
0
0
0
0
0
1
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