Z16FMC64AG20SG Zilog, Z16FMC64AG20SG Datasheet - Page 41

• Manufacturer Part Number: Z16FMC64AG20SG
• Description: Microcontrollers (MCU) 16BIT 64K FL 4K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC64AG20SG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: 0 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / Rohs Status: Details

Table 5. Register File Address Map (Continued)
PS028702-1210
Address (Hex)
FF_E0A0
FF_E0A1
GPIO Base Address = FF_E100
GPIO Port A Base Address = FF_E100
FF_E100
FF_E101
FF_E102
FF_E103
FF_E104
FF_E105
FF_E106
FF_E107
FF_E108
FF_E109-FF_E10B
FF_E10C
FF_E10D
FF_E10E
FF_E10F
GPIO Port B Base Address = FF_E110
FF_E110
FF_E111
FF_E112
FF_E113
FF_E114
FF_E115
FF_E116
FF_E117
FF_E118
FF_E119-FF_E11F
GPIO Port C Base Address = FF_E120
FF_E120
Register Description
Oscillator Control
Oscillator Divide
Port A Input Data
Port A Output Data
Port A Data Direction
Port A High Drive Enable
Port A Alternate Function High
Port A Alternate Function Low
Port A Output Control
Port A Pull-Up Enable
Port A Stop Mode Recovery
Enable
Port A Reserved
Port A Irq Mux1
Port A Reserved
Port A Irq Mux
Port A Irq Edge
Port B Input Data
Port B Output Data
Port B Data Direction
Port B High Drive Enable
Reserved
Port B Alternate Function Low
Port B Output Control
Port B Pull-Up Enable
Port B Stop Mode Recovery
Enable
Port B Reserved
Port C Input Data
P R E L I M I N A R Y
Mnemonic
OSCCTL
OSCDIV
PAIN
PAOUT
PADD
PAHDE
PAAFH
PAAFL
PAOC
PAPUE
PASMRE
PAIMUX1
PAIMUX
PAIEDGE
PBIN
PBOUT
PBDD
PBHDE
PBAFL
PBOC
PBPUE
PBSMRE
PCIN
Z16FMC Series Motor Control MCUs
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–
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Product Specification
Peripheral Address Map
Reset (Hex)
A0
00
XX
00
00
00
00
00
00
00
00
00
00
00
XX
00
00
00
00
00
00
00
XX
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