Z16FMC64AG20SG Zilog, Z16FMC64AG20SG Datasheet - Page 228

• Manufacturer Part Number: Z16FMC64AG20SG
• Description: Microcontrollers (MCU) 16BIT 64K FL 4K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC64AG20SG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: 0 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / Rohs Status: Details

ADC Overview
Architecture
Operation
PS028702-1210
The Z16FMC devices include a 12-channel ADC. The ADC converts an analog input sig-
nal to a 10-bit binary number. The features of the successive approximation ADC include:
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The architecture as illustrated in Figure 42 consists of an 12-input multiplexer, sample-
and-hold amplifier and 10-bit successive approximation ADC. The ADC digitizes the sig-
nal on selected channel and stores the digitized data in the ADC data registers. In environ-
ment with high electrical noise, an external RC filter must be added at the input pins to
reduce high frequency noise.
The ADC converts the analog input, ANAx, to a 10-bit digital representation. The equa-
tion for calculating the digital value is represented by:
ADC Output = 1024*(ANAx/VREF)
Assuming zero gain and offset errors, any voltage outside the ADC input limits of AVSS
and VREF returns all 0s or 1s, respectively.
A new conversion is initiated by either software write to the ADC Control Register’s
START bit or by PWM trigger. For detailed information about the PWM trigger, see the
Synchronization of PWM and ADC
stops any conversion currently in progress and begins a new conversion. To avoid disrupt-
ing a conversion already in progress, the START bit is read to indicate ADC operation sta-
tus (busy or available).
12 analog input sources multiplexed with GPIO ports
Fast conversion time (2.5 s)
Programmable timing controls
Interrupt on conversion complete
Internal voltage reference generator
Internal reference voltage available externally
Ability to supply external reference voltage
Ability to do simultaneous or independent conversions
P R E L I M I N A R Y
section on page 90. Initiating a new conversion
Z16FMC Series Motor Control MCUs
Product Specification
Analog Functions
206