Z16FMC64AG20SG Zilog, Z16FMC64AG20SG Datasheet - Page 247

• Manufacturer Part Number: Z16FMC64AG20SG
• Description: Microcontrollers (MCU) 16BIT 64K FL 4K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC64AG20SG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: 0 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / Rohs Status: Details

PS028702-1210
DMA Modes
EOF Closure
The
data from the peripheral. If the channel is in linked list mode then the DMAxCTL word is
written back to the CONTROL word of the descriptor. The DMAxLAR increments or is
loaded with new LAR data from the descriptor if the
Normal Closure
The
word is written back to the CONTROL word of the descriptor. The DMAxLAR incre-
ments or is loaded with new LAR data from the descriptor if the
Each DMA channel operates in two modes, direct and linked list. Both modes use the
DMA channel registers. The only difference is in how they are loaded. In direct mode, the
DMA channel registers are directly loaded by software. When the transfer is complete, the
DMA stops. In linked list mode the DMA will load its own registers from a descriptor list
which is pointed to by the DMAxLAR register. It then loads the next descriptor in the list
and continue executing.
The descriptor Control/Status field and address bytes have the same format as the control
and address registers in the DMA.
Direct Mode
Direct mode only uses the registers in the DMA for operation. The software writes these
register directly to set up and enable the DMA. Direct mode is entered by directly setting
the DMAxEN bit in the DMAxCTL0 register. Figure 47 displays the DMA registers and
how they point to the buffers allocated in memory.
DMAxEN
DMAxEN
bit is reset to 0. If the
bit is reset to 0. If the channel is in linked list mode then the DMAxCTL
P R E L I M I N A R Y
EOF
bit is set, the CMDSTAT field is set with the status
Z16FMC Series Motor Control MCUs
TXFR
bit is set.
Product Specification
TXFR
bit is set.
DMA Controller
225