Z16FMC64AG20SG Zilog, Z16FMC64AG20SG Datasheet - Page 139

• Manufacturer Part Number: Z16FMC64AG20SG
• Description: Microcontrollers (MCU) 16BIT 64K FL 4K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC64AG20SG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: 0 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / Rohs Status: Details

Z16FMC Series Motor Control MCUs
Product Specification
117
until the next address byte. If the new frame’s address matches the LIN-UART’s, then the
data in the new frame is processed.
The second scheme is enabled by setting
to
and writing the LIN-UART’s
MPMD[1:0]
10b
address into the LIN-UART address compare register. This mode introduces more hard-
ware control, interrupting only on frames which match the address of LIN-UART. When
an incoming address byte does not match the address of LIN-UART, it is ignored. All suc-
cessive data bytes in this frame are also ignored. When a matching address byte occurs, an
interrupt is issued and further interrupts occur on each successive data byte. The first data
byte in the frame has
in the LIN-UART Status 1 register. When the next
NEWFRM=1
address byte occurs, the hardware compares it to the address of LIN-UART. If there is a
match, the interrupt occurs and the NEWFRM bit is set for the first byte of the new frame.
If there is no match, the LIN-UART ignores all incoming bytes until the next address
match.
The third scheme is enabled by setting
to
and by writing the address of
MPMD[1:0]
11b
LIN-UART into the LIN-UART address compare register. This mode is identical to the
second scheme, except that there are no interrupts on address bytes. The first data byte of
each frame remains accompanied by a
assertion.
NEWFRM
LIN Protocol Mode
The LIN protocol as supported by the LIN-UART module is defined in revision 2.0 of the
LIN specification package. The LIN protocol specification covers all aspects of transfer-
ring information between LIN master and slave devices using message frames including
error detection and recovery, sleep mode and wake up from sleep mode. The LIN-UART
hardware in LIN mode provides character transfers to support the LIN protocol including
Break transmission and detection, WAKE-UP transmission and detection and slave auto-
bauding. Part of the error detection of the LIN protocol is for both master and slave
devices to monitor their receive data when transmitting. If the receive and transmit data
streams do not match, the LIN-UART asserts the PLE bit (physical layer error bit in
status0 register). The message frame timeout aspect of the protocol is left to software,
requiring the use of an additional general purpose timer. The LIN mode of the LIN-UART
does not provide any hardware support for computing/verifying the checksum field or to
verify the contents of the identifier field. These fields are treated as data and are not inter-
preted by the hardware.
The LIN bus contains a single master and one or more slaves. The LIN master is responsi-
ble for transmitting the message frame header which consists of the Break, Synch, and
Identifier fields. Either the master or one of the slaves transmits the associated response
section of the message, which consists of data characters followed by a checksum charac-
ter.
In LIN mode, the interrupts defined for normal UART operation still apply with the fol-
lowing changes:
PS028702-1210
P R E L I M I N A R Y
LIN-UART