MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 980

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

PCI Bus Interface
17.1
The PCI controller acts as a bridge between the PCI interface and the OCeaN switch fabric.
a high-level block diagram of the PCI controller.
17.1.1
The PCI controller connects the OCeaN to the PCI bus, to which I/O components are connected. The PCI
bus uses a 32-bit multiplexed address/data bus, plus various control and error signals. The PCI interface
supports address and data parity with error checking and reporting.
The integrated processor’s PCI interface functions both as a master (initiator) and a target device.
Internally, the design is divided into the following:
The data path blocks contain the queues, tables for transaction tracking, and ordering. The control blocks
contain control logic and state-machines for buffer control, bus protocol, tag generation, and transaction
resizing. The memory blocks are used solely for inbound and outbound data storage. This allows the
integrated processor to handle separate PCI transactions simultaneously. For example, consider the case
where a burst-write transaction from the integrated processor to another PCI device terminates with a
17-2
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•
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Data path blocks
Control logic blocks
Memory
Introduction
Overview
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Figure 17-1. PCI Controller Block Diagram
OCeaN Physical Interface
PCI Bus Interface
OCeaN Gasket
PCI Interface
Regs
Arb
PCI
Freescale Semiconductor
Figure 17-1
is