MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 578

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Security Engine (SEC) 2.1
12.5.1.3
The CCDPRs, shown in
processing.
The bits in the current descriptor pointer register perform the functions described in
12-100
28–31
32–63 CUR_DES_PTR_ADRS Current descriptor pointer address. Pointer to system memory location of the current
Address Channel_1 0x3_1140
0–27
Bits
Reset
W
R
Channel_2 0x3_1240
Channel_3 0x3_1340
Channel_4 0x3_1440
0
Crypto-Channel Current Descriptor Pointer Registers 1–4 (CCDPR n )
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Table 12-57. Channel Current Descriptor Pointer Register Field Descriptions
Name
EPTR
—
Figure 12-75. Crypto-Channel Current Descriptor Pointer Register
Figure
—
Reserved. Set to zero.
Extended pointer. Concatenated as the top 4 bits of the CUR_DES_PTR_ADRS when EAE
is high (see the EAE bit in Table 1-51 on page 1-116).
descriptor. This field reflects the starting location in system memory of the descriptor
currently loaded into the DB. This value is updated whenever the channel requests a fetch
of a descriptor from the controller.
The value from the fetch FIFO is transferred to the current descriptor pointer register
immediately after the fetch is completed.
This address will be used as the destination for writeback of the modified header dword, if
header writeback notification is enabled.
12-75, contain the address of the descriptor that the channel is currently
27 28
EPTR
All zeros
31 32
Description
CUR_DES_PTR_ADRS
Freescale Semiconductor
Table
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12-57.
63