MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 1112
MPC8533EVTARJ
Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTARJ
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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PCI Express Interface Controller
Table 18-68
18.3.8.3.16 PCI Express I/O Limit Upper 16 Bits Register—0x32
Note that this device does not support inbound I/O transactions. The I/O limit upper 16 bits register is
shown in
Table 18-69
18.3.8.3.17 Capabilities Pointer Register—0x34
The capabilities pointer identifies additional functionality supported by the device.
18-64
Bits
7–0
15–0
15–0
Bits
Offset 0x32
Reset
Bits
Offset 0x34
Reset
W
Capabilities Pointer The capabilities pointer provides the offset (0x44) for additional PCI-compatible registers above the
R
W
R
Figure
I/O Limit Upper 16 Bits Specifies bits 31–16 of the I/O space ending address when the address decode type field
I/O Base Upper 16 Bits Specifies bits 31–16 of the I/O space start address when the address decode type field in
15
Name
describes the I/O base upper 16 bits register fields.
describes the I/O limit upper 16 bits register fields.
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Table 18-68. PCI Express I/O Base Upper 16 Bits Register Field Description
Table 18-69. PCI Express I/O Limit Upper 16 Bits Register Field Description
0
7
Name
Name
18-73.
common 64-byte header. Refer to
Space,” for more information.
Table 18-70. Capabilities Pointer Register Field Description
Figure 18-73. PCI Express I/O Limit Upper 16 Bits Register
1
in the I/O limit register is 0x01.
the I/O base register is 0x01.
Figure 18-74. Capabilities Pointer Register
0
I/O Limit Upper 16 Bits
Capabilities Pointer
0
Section 18.3.9, “PCI Compatible Device-Specific Configuration
All zeros
Description
0
Description
Description
1
0
Freescale Semiconductor
Access: Read-only
Access: Read-only
0
0
0
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