MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 180

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Reset, Clocking, and Initialization
4.4.4.2
Clocks for these high speed interfaces on the MPC8533E are derived from a PLL in the SerDes block. This
PLL is driven by a reference clock (SD_REF_CLK/SD_REF_CLK) whose input frequency is a function
of the protocol and bit rate being used as shown in
4.4.4.2.1
Section 4.4.3.6, “I/O Port
that the CCB clock frequency must be considered for proper operation of such interfaces as described
below.
For proper PCI Express operation, the CCB clock frequency must be greater than:
4-22
cfg_core_pll[0:2]
cfg_sys_pll[0:3]
PCI_CLK
SYSCLK
PCI Express
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Minimum Frequency Requirements
PCI Express
Interfaces
MPC8533E
4
3
Selection,” describes various high-speed interface configuration options. Note
500 MHz
-----------------------------------------------------------------------------------------
Figure 4-6. Clock Subsystem Block Diagram
Table 4-29. High Speed Interface Clocking
Device PLL
e500 Core
PCI
2.5 Gbps
Bit Rate
×
CCB_clk
(
PCI Express link width
Core PLL
CCB_clk to Rest
of the Device
Table
8
100 MHz (Spread Spectrum supported)
÷
÷
n
4-29.
2
Reference Clock Frequency
DDR
PLL
core_clk
6
6
)
MCK[0:5]
MCK[0:5]
LSYNC_IN
LSYNC_OUT
LCLK0
LCLK1
LCLK2
Freescale Semiconductor
DDR
Controller
LBC