MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 731
MPC8533EVTARJ
Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTARJ
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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Chapter 15
Enhanced Three-Speed Ethernet Controllers
15.1
The enhanced three-speed Ethernet controllers (eTSECs) of the device interface to 10 Mbps, 100 Mbps,
and 1 Gbps Ethernet/IEEE 802.3 networks and devices featuring generic 8-bit FIFO ports. For Ethernet,
an external PHY or SerDes device is required to complete the interface to the media. Each eTSEC supports
multiple standard media-independent interfaces, of which the FIFO interface bypasses the Ethernet MAC.
Two eTSECs are available, providing flexible options for connectivity and control access at different
speeds.
The eTSEC provides the flexibility to accelerate the identification and retrieval of standard and
non-standard protocols carried over Ethernet, including both IP versions 4 and 6 and TCP/UDP.
CPU-intensive parsing and checksum operations can be optionally off-loaded to an eTSEC to accelerate
existing TCP/IP stacks. On transmission, varying fractions of link bandwidth can be allocated to each of
multiple transmit queues through a modified weighted round-robin scheduler. On receive, an arbitrary set
of queue selection rules can be programmed into each eTSEC to implement flexible quality of service or
firewall strategies based on high-level protocol identification. Without enabling these advanced features,
each eTSEC emulates a PowerQUICC III TSEC, allowing existing driver software to be re-used with
minimal change. Each eTSEC is organized as shown in
Freescale Semiconductor
Overview
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Although this chapter describes the implementation of and interaction
between four eTSEC interfaces, the MPC8533E only offers two (eTSEC
interfaces 1 and 3). All references to eTSECs 2 and 4 should be disregarded
for the MPC8533E.
NOTE
Figure
15-1.
15-1
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