CY7C67300-100AXA Cypress Semiconductor Corp, CY7C67300-100AXA Datasheet - Page 77
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CY7C67300-100AXA
Manufacturer Part Number
CY7C67300-100AXA
Description
IC,Peripheral (Multifunction) Controller,QFP,100PIN
Manufacturer
Cypress Semiconductor Corp
Series
EZ-Host™r
Datasheet
1.CY7C67300-100AXA.pdf
(98 pages)
Specifications of CY7C67300-100AXA
Applications
USB Host/Peripheral Controller
Core Processor
CY16
Program Memory Type
ROM (8 kB)
Controller Series
CY7C673xx
Ram Size
16K x 8
Interface
SPI Serial, USB, HPI
Number Of I /o
32
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C67300-100AXA
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Company:
Part Number:
CY7C67300-100AXAT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document #: 38-08015 Rev. *G
PWM n Start Register [R/W]
Register Description
The PWM n Start Register designates where in the window defined by the PWM Maximum Count Register to start the PWM pulse
for a given channel.
Address (Bits [9:0])
The Address field designates when to start the PWM pulse. If this start value is equal to the Stop Count Value then the output
stays at false.
Reserved
All reserved bits should be written as ‘0’.
PWM n Stop Register [R/W]
Register Description
The PWM n Stop Register designates where in the window defined by the PWM Maximum Count Register to stop the PWM pulse
for a given channel.
Address (Bits [9:0])
The Address field designates when to stop the PWM pulse. If the PWM Start value is equal to the PWM Stop value then the output
stays at ‘0’. If the PWM Stop value is greater then the PWM Maximum Count value then the output stays at true.
Reserved
All reserved bits should bit written as ‘0’.
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
• PWM 0 Start Register 0xC0EA
• PWM 1 Start Register 0xC0EE
• PWM 2 Start Register 0xC0F2
• PWM 3 Start Register 0xC0F6
• PWM 0 Stop Register 0xC0EC
• PWM 1 Stop Register 0xC0F0
• PWM 2 Stop Register 0xC0F4
• PWM 3 Stop Register 0xC0F8
7
R/W
R/W
15
15
0
7
0
0
0
-
-
6
R/W
R/W
14
14
6
0
0
0
0
-
-
5
Figure 88. PWM n Start Register
Figure 89. PWM n Stop Register
R/W
R/W
13
13
5
0
0
0
0
-
-
Reserved
Reserved
4
R/W
R/W
12
12
0
4
0
0
0
-
-
...Address
...Address
3
R/W
R/W
11
11
0
3
0
0
0
-
-
2
R/W
R/W
10
10
0
2
0
0
0
-
-
1
R/W
R/W
R/W
R/W
1
0
9
0
9
0
0
CY7C67300
Address...
Address...
Page 77 of 98
0
R/W
R/W
R/W
R/W
0
0
8
0
8
0
0
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