CY7C67300-100AXA Cypress Semiconductor Corp, CY7C67300-100AXA Datasheet - Page 31

• Manufacturer Part Number: CY7C67300-100AXA
• Description: IC,Peripheral (Multifunction) Controller,QFP,100PIN
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-Host™r

Specifications of CY7C67300-100AXA

• Applications: USB Host/Peripheral Controller
• Core Processor: CY16
• Program Memory Type: ROM (8 kB)
• Controller Series: CY7C673xx
• Ram Size: 16K x 8
• Interface: SPI Serial, USB, HPI
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-08015 Rev. *G
Host n Count Register [R/W]
Register Description
The Host n Count Register is used to hold the number of bytes
(packet length) for the current transaction. The maximum
packet length is 1023 bytes in ISO mode. The Host Count
value is used to determine how many bytes to transmit, or the
maximum number of bytes to receive. If the number of
received bytes is greater then the Host Count value then an
overflow condition will be flagged by the Overflow bit in the
Host n Endpoint Status Register.
Port Select (Bit 14)
The Port Select bit selects which of the two active ports is
selected and is summarized in
1: Port 1B or Port 2B is enabled
0: Port 1A or Port 2A is enabled
Host n Endpoint Status Register [R]
Register Description
The Host n Endpoint Status Register is a read-only register
that provides status for the last USB transaction.
Overflow Flag (Bit 11)
The Overflow Flag bit indicates that the received data in the
last data transaction exceeded the maximum length specified
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
• Host 1 Count Register 0xC084.
• Host 2 Count Register 0xC0A4.
• Host 1 Endpoint Status Register 0xC086.
• Host 2 Endpoint Status Register 0xC0A6.
Reserved
R/W
Flag
Stall
15
15
R
0
7
0
0
7
0
-
-
Table
Select
R/W
R/W
NAK
Flag
Port
14
14
R
0
6
0
0
6
0
-
33.
Reserved
Figure 29. Host n Endpoint Status Register
Exception
Figure 28. Host n Count Register
Length
Flag
R/W
13
13
R
0
5
0
0
5
0
-
-
Reserved
R/W
12
12
0
4
0
0
4
0
-
-
-
Table 33.Port Select Definition
Count (Bits [9:0])
The Count field sets the value for the current transaction data
packet length. This value is retained when switching between
host and device mode, and back again.
Reserved
All reserved bits should be written as ‘0’.
in the Host n Count Register. The Overflow Flag should be
checked in response to a Length Exception signified by the
Length Exception Flag set to ‘1’.
1: Overflow condition occurred
0: Overflow condition did not occur
Reserved
...Count
Port Select
Sequence
Overflow
0
1
Status
Flag
R/W
11
11
0
R
R
3
0
0
3
0
-
Underflow
Host/Device 1
Timeout
Active Port
Flag
R/W
Flag
10
10
0
R
R
2
0
0
2
0
-
A
B
R/W
Error
R/W
Flag
9
0
R
1
0
9
0
1
0
-
CY7C67300
Reserved
Host/Device 2
Count...
Active Port
Page 31 of 98
A
B
R/W
ACK
R/W
Flag
8
0
8
0
R
0
0
-
0
0
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