CY7C67300-100AXA Cypress Semiconductor Corp, CY7C67300-100AXA Datasheet - Page 73

• Manufacturer Part Number: CY7C67300-100AXA
• Description: IC,Peripheral (Multifunction) Controller,QFP,100PIN
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-Host™r

Specifications of CY7C67300-100AXA

• Applications: USB Host/Peripheral Controller
• Core Processor: CY16
• Program Memory Type: ROM (8 kB)
• Controller Series: CY7C673xx
• Ram Size: 16K x 8
• Interface: SPI Serial, USB, HPI
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-08015 Rev. *G
Register Description
The SPI Receive Count Register designates the block byte
length for the SPI receive DMA transfer.
Count (Bits [10:0])
The Count field sets the count for the SPI receive DMA
transfer.
Reserved
All reserved bits should be written as ‘0’.
UART Control Register [0xC0E0] [R/W]
Register Description
The UART Control Register enables or disables the UART,
allowing GPIO28 (UART_TXD) and GPIO27 (UART_RXD) to
be freed up for general use. This register must also be written
to set the baud rate, which is based on a 48-MHz clock.
Scale Select (Bit 4)
The Scale Select bit acts as a prescaler that will divide the
baud rate by eight.
1: Enable prescaler
0: Disable prescaler
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
15
0
7
0
-
-
...Reserved
14
0
6
0
-
-
Figure 83. UART Control Register
13
0
5
0
-
-
Scale Select
R/W
12
0
4
0
-
Reserved...
UART Registers
There are three registers dedicated to UART operation. Each
of these registers is covered in this section and summarized
in
Table 47.UART Registers
Baud Select (Bits [3:1])
Refer to
Table 48.UART Baud Select Definition
UART Enable (Bit 0)
The UART Enable bit enables or disables the UART.
1: Enable UART
0: Disable UART. This allows GPIO28 and GPIO27 to be used
for general use.
Reserved
All reserved bits should bit written as ‘0’.
UART Control Register
UART Status Register
UART Data Register
Baud Select
Table
[3:1]
000
001
010
100
101
011
110
111
Register Name
47.
Table 48
R/W
11
0
3
0
-
Baud Rate w/ DIV8 = 0 Baud Rate w/ DIV8 = 1
for a definition of this field.
115.2 KBaud
57.6 KBaud
38.4 KBaud
28.8 KBaud
19.2 KBaud
14.4 KBaud
9.6 KBaud
7.2 KBaud
Baud Select
R/W
10
0
2
1
-
Address
0xC0E0
0xC0E2
0xC0E4
R/W
9
0
1
1
-
CY7C67300
14.4 KBaud
7.2 KBaud
4.8 KBaud
3.6 KBaud
2.4 KBaud
1.8 KBaud
1.2 KBaud
0.9 KBaud
Page 73 of 98
UART Enable
R/W
R/W
R/W
R/W
8
0
0
1
R
-
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