CY7C67300-100AXA Cypress Semiconductor Corp, CY7C67300-100AXA Datasheet - Page 32

IC,Peripheral (Multifunction) Controller,QFP,100PIN

CY7C67300-100AXA

Manufacturer Part Number
CY7C67300-100AXA
Description
IC,Peripheral (Multifunction) Controller,QFP,100PIN
Manufacturer
Cypress Semiconductor Corp
Series
EZ-Host™r
Datasheet

Specifications of CY7C67300-100AXA

Applications
USB Host/Peripheral Controller
Core Processor
CY16
Program Memory Type
ROM (8 kB)
Controller Series
CY7C673xx
Ram Size
16K x 8
Interface
SPI Serial, USB, HPI
Number Of I /o
32
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C67300-100AXA
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C67300-100AXAT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document #: 38-08015 Rev. *G
Underflow Flag (Bit 10)
The Underflow Flag bit indicates that the received data in the
last data transaction was less than the maximum length
specified in the Host n Count Register. The Underflow Flag
should be checked in response to a Length Exception signified
by the Length Exception Flag set to ‘1’.
1: Underflow condition occurred
0: Underflow condition did not occur
Stall Flag (Bit 7)
The Stall Flag bit indicates that the peripheral device replied
with a Stall in the last transaction.
1: Device returned Stall
0: Device did not return Stall
NAK Flag (Bit 6)
The NAK Flag bit indicates that the peripheral device replied
with a NAK in the last transaction.
1: Device returned NAK
0: Device did not return NAK
Length Exception Flag (Bit 5)
The Length Exception Flag bit indicates that the received data
in the data stage of the last transaction does not equal the
maximum Host Count specified in the Host n Count Register.
A Length Exception can either mean an overflow or underflow
and the Overflow and Underflow flags (bits 11 and 10, respec-
tively) should be checked to determine which event occurred.
1: An overflow or underflow condition occurred
0: An overflow or underflow condition did not occur
Sequence Status (Bit 3)
The Sequence Status bit indicates the state of the last received
data toggle from the device. Firmware is responsible for
monitoring and handling the sequence status. The Sequence
bit is only valid if the ACK bit is set to ‘1’. The Sequence bit is
Host n PID Register [W]
Register Description
The Host n PID Register is a write-only register that provides the PID and Endpoint information to the USB SIE to be used in the
next transaction.
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
• Host 1 PID Register 0xC086.
• Host 2 PID Register 0xC0A6.
15
W
0
7
0
-
14
W
0
6
0
-
PID Select
Figure 30. Host n PID Register
13
W
0
5
0
-
12
W
0
4
0
-
set to ‘0’ when an error is detected in the transaction and the
Error bit will be set.
1: DATA1
0: DATA0
Timeout Flag (Bit 2)
The Timeout Flag bit indicates if a timeout condition occurred
for the last transaction. A timeout condition can occur when a
device either takes too long to respond to a USB host request
or takes too long to respond with a handshake.
1: Timeout occurred
0: Timeout did not occur
Error Flag (Bit 1)
The Error Flag bit indicates a transaction failed for any reason
other than the following: timeout, receiving a NAK, or receiving
a STALL. Overflow and Underflow are not considered errors
and do not affect this bit. CRC5 and CRC16 errors result in an
Error flag along with receiving incorrect packet types.
1: Error detected
0: No error detected
ACK Flag (Bit 0)
The ACK Flag bit indicates two different conditions depending
on the transfer type. For non-Isochronous transfers, this bit
represents a transaction ending by receiving or sending an
ACK packet. For Isochronous transfers, this bit represents a
successful transaction that will not be represented by an ACK
packet.
1: For non-Isochronous transfers, the transaction was ACKed.
For Isochronous transfers, the transaction was completed
successfully
0: For non-Isochronous transfers, the transaction was not
ACKed. For Isochronous transfers, the transaction did not
complete successfully
Reserved
11
W
0
3
0
-
10
W
0
2
0
-
Endpoint Select
W
9
0
-
1
0
CY7C67300
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W
8
0
-
0
0
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