CY7C67300-100AXA Cypress Semiconductor Corp, CY7C67300-100AXA Datasheet - Page 12

• Manufacturer Part Number: CY7C67300-100AXA
• Description: IC,Peripheral (Multifunction) Controller,QFP,100PIN
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-Host™r

Specifications of CY7C67300-100AXA

• Applications: USB Host/Peripheral Controller
• Core Processor: CY16
• Program Memory Type: ROM (8 kB)
• Controller Series: CY7C673xx
• Ram Size: 16K x 8
• Interface: SPI Serial, USB, HPI
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-08015 Rev. *G
Booster Pins.
Table 17.Charge Pump Interface Pins
Crystal Interface
The recommended crystal circuit to be used with EZ-Host is
shown in
circuit, connect it to XTALIN and leave XTALOUT uncon-
nected. For further information on the crystal requirements,
see Crystal Requirements
It should be noted that the CLKSEL pin (pin 38) is sampled
after reset to determine what crystal or clock source frequency
is used. For normal operation, 12 MHz is required so the
CLKSEL pin must have a 47-kohm pull-up resistor to V
Crystal Pins
Table 18.Crystal Pins
Boot Configuration Interface
EZ-Host can boot into any one of four modes. The mode it
boots into is determined by the TTL voltage level of
GPIO[31:30] at the time nRESET is deasserted. The table
below shows the different boot pin combinations possible.
CY7C67300
BOOSTVcc
Figure 8
VSWITCH
Pin Name
Pin Name
XTALOUT
XTALIN
XTALOUT
XTALIN
Figure 8. Crystal Interface
If an oscillator is used instead of a crystal
C1 = 22 pF
Table
Y1
52.
12MHz
Parallel Resonant
Fundamental Mode
500uW
20-33pf ±5%
Pin Number
Pin Number
C2 = 22 pF
16
14
29
28
CC.
.
After a reset pin event occurs, the BIOS bootup procedure
executes for up to 3 ms. GPIO[31:30] are sampled by the BIOS
during bootup only. After bootup these pins are available to the
application as GPIOs.
Table 19.Boot Configuration Interface
GPIO[31:30] should be pulled high or low as needed using
resistors tied to V
5 KΩ and 15 KΩ. GPIO[31:30] should not be tied directly to
V
those two pins are used for the serial I2C EEPROM (if imple-
mented). The resistors used for these pull ups should conform
to the serial EEPROM manufacturer's requirements.
If any mode other then standalone is chosen, EZ-Host will be
in coprocessor mode. The device powers up with the appro-
priate communication interface enabled according to its boot
pins and waits idle until a coprocessor communicates with it.
See the BIOS documentation for greater detail of the boot
process.
Operational Modes
The operational modes are discussed in the following
sections.
Coprocessor Mode
EZ-Host can act as a coprocessor to an external host
processor. In this mode, an external host processor drives
EZ-Host and is the main processor rather then EZ-Host’s own
16-bit internal CPU. An external host processor may interface
to EZ-Host through one of the following three interfaces in
coprocessor mode:
At bootup GPIO[31:30] determine which of these three inter-
faces are used for coprocessor mode. See
Bootloading begins from the selected interface after POR +
3 ms of BIOS bootup.
• HPI mode, a 16-bit parallel interface with up to 16 MB
• HSS mode, a serial interface with up to 2 MBaud transfer
• SPI mode, a serial interface with up to 2 Mb/s transfer rate.
CC
GPIO31
(Pin 39)
transfer rate
rate
or GND. Note that in standalone mode, the pull ups on
0
0
1
1
GPIO30
(Pin 40)
0
1
0
1
CC
or GND with resistor values between
Host Port Interface (HPI)
High-Speed Serial (HSS)
Serial Peripheral Interface (SPI,
slave mode)
I
2
C EEPROM (Standalone Mode)
Boot Mode
CY7C67300
Table 19
Page 12 of 98
for details.
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