CY7C67300-100AXA Cypress Semiconductor Corp, CY7C67300-100AXA Datasheet - Page 52

• Manufacturer Part Number: CY7C67300-100AXA
• Description: IC,Peripheral (Multifunction) Controller,QFP,100PIN
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-Host™r

Specifications of CY7C67300-100AXA

• Applications: USB Host/Peripheral Controller
• Core Processor: CY16
• Program Memory Type: ROM (8 kB)
• Controller Series: CY7C673xx
• Ram Size: 16K x 8
• Interface: SPI Serial, USB, HPI
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-08015 Rev. *G
GPIO n Direction Register [R/W]
Register Description
The GPIO n Direction Register controls the direction of the
GPIO data pins (input/output). The GPIO 0 Direction Register
controls GPIO15 to GPIO0 while the GPIO 1 Direction
Register controls GPIO31 to GPIO16.
Direction Select (Bits [15:0])
The Direction Select field[15:0] configures the corresponding
GPIO15–0 or GPIO31–16 pins as either input or output. When
any bit of this register is set to ‘1’, the corresponding GPIO data
pin becomes an output. When any bit of this register is set to
‘0’, the corresponding GPIO data pin becomes an input.
IDE Mode Register [0xC048] [R/ W]
Register Description
The IDE Mode Register allows the selection of IDE PIO Modes 0, 1, 2, 3, or 4. The default setting is zero which means IDE PIO
Mode 0.
Mode Select (Bits [2:0])
The Mode Select field sets PIO Mode 0 to 4 in IDE mode. Refer to
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
• GPIO 0 Direction Register 0xC022
• GPIO 1 Direction Register 0xC028
31/15
R/W
23/7
R/W
15
0
0
0
7
0
-
-
30/14
R/W
22/6
R/W
14
0
0
0
6
0
-
-
Figure 53. GPIO n Direction Register
...Reserved
29/13
21/5
R/W
R/W
Figure 54. IDE Mode Register
13
0
0
0
5
0
-
-
28/12
20/4
R/W
R/W
12
...Direction Select
Direction Select...
4
0
0
0
0
-
-
Reserved...
IDE Registers
In addition to the standard IDE PIO Port registers, there are
four registers dedicated to IDE operation. These registers are
covered in this section and summarized in
Table 39.IDE Registers
IDE Mode Register
IDE Start Address Register
IDE Stop Address Register
IDE Control Register
IDE PIO Port Registers
Table 40
Register Name
27/11
19/3
R/W
R/W
R/W
for a definition of this field.
11
3
0
0
0
0
-
26/10
18/2
R/W
R/W
R/W
10
2
0
0
0
0
-
0xC048
0xC04A
0xC04C
0xC04E
0xC050-0xC06F
Mode Select
Address
R/W
17/1
R/W
25/9
R/W
1
0
0
0
9
0
-
CY7C67300
Table
Page 52 of 98
39.
R/W
16/0
R/W
24/8
R/W
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
8
0
0
-
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