CY7C67300-100AXA Cypress Semiconductor Corp, CY7C67300-100AXA Datasheet - Page 25

• Manufacturer Part Number: CY7C67300-100AXA
• Description: IC,Peripheral (Multifunction) Controller,QFP,100PIN
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-Host™r

Specifications of CY7C67300-100AXA

• Applications: USB Host/Peripheral Controller
• Core Processor: CY16
• Program Memory Type: ROM (8 kB)
• Controller Series: CY7C673xx
• Ram Size: 16K x 8
• Interface: SPI Serial, USB, HPI
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-08015 Rev. *G
External Memory Control Register [0xC03A] [R/W]
Register Description
The External Memory Control Register provides control of
Wait States for the external SRAM or ROM. All wait states are
based off of 48 MHz.
XRAM Merge Enable (Bit 13)
The XRAM Merge Enable bit enables or disables the RAM
merge feature. When the RAM merge feature is enabled, the
nXRAMSEL will be active whenever the nXMEMSEL is active.
1: Enable RAM merge
0: Disable RAM merge
XROM Merge Enable (Bit 12)
The XROM Merge Enable bit enables or disables the ROM
merge feature. When the ROM merge feature is enabled, the
nXROMSEL will be active whenever the nXMEMSEL is active.
1: Enable ROM merge
0: Disable ROM merge
XMEM Width Select (Bit 11)
The XMEM Width Select bit selects the extended memory
width.
1: Extended memory = 8
0: Extended memory = 16
XMEM Wait Select (Bits [10:8])
The XMEM Wait Select field selects the extended memory wait
state from 0 to 7.
XROM Width Select (Bit 7)
The XROM Width Select bit selects the external ROM width.
1: External memory = 8
0: External memory = 16
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
XROM Width
Select
R/W
15
X
X
7
-
Reserved
R/W
14
X
X
6
-
Figure 22. External Memory Control Register
XRAM Merge
XROM Wait
Enable
Select
R/W
R/W
13
X
X
5
XROM Merge
Enable
R/W
R/W
12
X
X
4
XROM Wait Select (Bits[6:4])
The XROM Wait Select field selects the external ROM wait
state from 0 to 7.
XRAM Width Select (Bit 3)
The XRAM Width Select bit selects the external RAM width.
1: External memory = 8
0: External memory = 16
XRAM Wait Select (Bits[2:0])
The XRAM Wait Select field selects the external RAM wait
state from 0 to 7.
Reserved
All reserved bits should be written as ‘0’.
Timer Registers
There are three registers dedicated to timer operations. Each
of these registers are discussed in this section and are
summarized in
Table 27.Timer Registers
Watchdog Timer Register
Timer 0 Register
Timer 1 Register
XMEM Width
XRAM Width
Register Name
Select
Select
R/W
R/W
11
X
X
3
Table
27.
R/W
R/W
10
X
X
2
Address
0xC00C
XRAM Wait
0xC010
0xC012
XMEM Wait
Select
Select
R/W
R/W
X
X
1
9
CY7C67300
Page 25 of 98
R/W
R/W
R/W
R/W
R/W
R/W
X
0
8
X
[+] Feedback