CY7C67300-100AXA Cypress Semiconductor Corp, CY7C67300-100AXA Datasheet - Page 71

• Manufacturer Part Number: CY7C67300-100AXA
• Description: IC,Peripheral (Multifunction) Controller,QFP,100PIN
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-Host™r

Specifications of CY7C67300-100AXA

• Applications: USB Host/Peripheral Controller
• Core Processor: CY16
• Program Memory Type: ROM (8 kB)
• Controller Series: CY7C673xx
• Ram Size: 16K x 8
• Interface: SPI Serial, USB, HPI
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-08015 Rev. *G
SPI Data Register [0xC0D6] [R/W]
Register Description
The SPI Data Register contains data received on the SPI port when read. Reading it empties the eight byte receive FIFO in PIO
byte mode. This receive data is valid when the Receive Interrupt Bit of the SPI Status Register is set to ‘1’ (RxIntVal triggers) or
the Receive Data Ready bit of the SPI Control Register is set to ‘1’. Writing to this register in PIO byte mode initiates a transfer
of data, the number of bits defined by Transmit Bit Length field in the SPI Control Register.
Data (Bits [7:0])
The Data field contains data received or to be transmitted on the SPI port.
Reserved
All reserved bits should be written as ‘0’.
SPI Transmit Address Register [0xC0D8] [R/W]
Register Description
The SPI Transmit Address Register is used as the base address for the SPI transmit DMA.
Address (Bits [15:0])
The Address field sets the base address for the SPI transmit DMA.
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
R/W
R/W
R/W
15
15
X
X
7
0
7
0
-
R/W
R/W
R/W
14
14
X
6
X
0
6
0
-
Figure 79. SPI Transmit Address Register
R/W
R/W
R/W
13
13
Figure 78. SPI Data Register
X
X
5
0
5
0
-
R/W
R/W
R/W
12
12
X
X
4
4
0
0
-
...Address
Address...
Reserved
Data
R/W
R/W
R/W
11
11
X
X
3
3
0
0
-
R/W
R/W
R/W
10
10
X
X
2
2
0
0
-
R/W
R/W
R/W
X
1
X
9
1
0
-
9
0
CY7C67300
Page 71 of 98
R/W
R/W
R/W
X
X
0
8
0
0
-
8
0
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