CY7C67300-100AXA Cypress Semiconductor Corp, CY7C67300-100AXA Datasheet - Page 63

• Manufacturer Part Number: CY7C67300-100AXA
• Description: IC,Peripheral (Multifunction) Controller,QFP,100PIN
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-Host™r

Specifications of CY7C67300-100AXA

• Applications: USB Host/Peripheral Controller
• Core Processor: CY16
• Program Memory Type: ROM (8 kB)
• Controller Series: CY7C673xx
• Ram Size: 16K x 8
• Interface: SPI Serial, USB, HPI
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-08015 Rev. *G
SIEXmsg Register [W]
Register Description
The SIEXmsg Register allows an interrupt to be generated on the HPI port. Any write to this register causes the SIEXmsg flag in
the HPI Status Port to go high and also causes an interrupt on the HPI_INTR pin. The SIEXmsg flag is automatically cleared
when the HPI port reads from this register.
Data (Bits [15:0])
The Data field[15:0] simply needs to have any value written to it to cause SIExmsg flag in the HPI Status Port to go high.
HPI Mailbox Register [0xC0C6] [R/W]
Register Description
The HPI Mailbox Register provides a common mailbox between the CY7C67300 and the external host processor.
If enabled, the HPI Mailbox RX Full interrupt triggers when the external host processor writes to this register. When the
CY7C67300 reads this register the HPI Mailbox RX Full interrupt is automatically cleared.
If enabled, the HPI Mailbox TX Empty interrupt triggers when the external host processor reads from this register. The HPI Mailbox
TX Empty interrupt automatically clears when the CY7C67300 writes to this register.
In addition, when the CY7C67300 writes to this register, the HPI_INTR signal on the HPI port asserts, signaling the external
processor that there is data in the mailbox to read. The HPI_INTR signal deasserts when the external host processor reads from
this register.
Message (Bits [15:0])
The Message field contains the message that the host processor wrote to the HPI Mailbox Register.
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
• SIE1msg Register 0x0144
• SIE2msg Register 0x0148
R/W
R/W
15
15
W
W
X
X
7
0
7
0
R/W
R/W
14
14
W
W
X
X
6
0
6
0
Figure 69. HPI Mailbox Register
R/W
R/W
Figure 68. SIEXmsg Register
13
13
W
W
X
X
5
0
5
0
R/W
R/W
12
12
W
W
X
4
X
0
4
0
Message...
...Message
...Data
Data...
R/W
R/W
11
W
W
11
X
3
X
0
3
0
R/W
R/W
10
10
W
W
X
X
2
0
2
0
R/W
R/W
W
W
X
X
1
9
9
0
1
0
CY7C67300
Page 63 of 98
R/W
R/W
W
W
X
X
0
8
8
0
0
0
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