CY7C67300-100AXA Cypress Semiconductor Corp, CY7C67300-100AXA Datasheet - Page 16

• Manufacturer Part Number: CY7C67300-100AXA
• Description: IC,Peripheral (Multifunction) Controller,QFP,100PIN
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-Host™r

Specifications of CY7C67300-100AXA

• Applications: USB Host/Peripheral Controller
• Core Processor: CY16
• Program Memory Type: ROM (8 kB)
• Controller Series: CY7C673xx
• Ram Size: 16K x 8
• Interface: SPI Serial, USB, HPI
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-08015 Rev. *G
Registers
Some registers have different functions for a read vs. a write
access or USB host vs. USB device mode. Therefore,
registers of this type have multiple definitions for the same
address.
The default register values listed in this data sheet may be
altered to some other value during the BIOS initialization.
Refer to the BIOS documentation for Register initialization
information.
Processor Control Registers
There are nine registers dedicated to general processor
control. Each of these registers are covered in this section and
are summarized in
CPU Flags Register [0xC000] [R]
Register Description
The CPU Flags Register is a read-only register that gives
processor flags status.
Global Interrupt Enable (Bit 4)
The Global Interrupt Enable bit indicates if the Global Inter-
rupts are enabled.
1: Enabled
0: Disabled
Negative Flag (Bit 3)
The Negative Flag bit indicates if an arithmetic operation
results in a negative answer.
1: MS result bit is ‘1’
0: MS result bit is not ‘1’
Overflow Flag (Bit 2)
The Overflow Flag bit indicates if an overflow condition
occurred. An overflow condition can occur if an arithmetic
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Table
15
0
7
0
-
-
21.
...Reserved
14
0
6
0
-
-
Figure 11. CPU Flags Register
13
0
5
0
-
-
Interrupt
Enable
Global
12
R
X
0
4
-
Reserved...
Table 21.Processor Control Registers
result was either larger than the destination operand size (for
addition) or smaller than the destination operand should allow
for subtraction.
1: Overflow occurred
0: Overflow did not occur
Carry Flag (Bit 1)
The Carry Flag bit indicates if an arithmetic operation resulted
in a Carry for addition, or Borrow for subtraction.
1: Carry/Borrow occurred
0: Carry/Borrow did not occur
Zero Flag (Bit 0)
The Zero Flag bit indicates if an instruction execution resulted
in a ‘0’.
1: Zero occurred
0: Zero did not occur
CPU Flags Register
Register Bank Register
Hardware Revision Register
CPU Speed Register
Power Control Register
Interrupt Enable Register
Breakpoint Register
USB Diagnostic Register
Memory Diagnostic Register
Negative
Register Name
Flag
11
R
X
0
3
-
Overflow
Flag
10
R
X
0
2
-
0xC000
0xC002
0xC004
0xC008
0xC00A
0xC00E
0xC014
0xC03C
0xC03E
Address
Carry
Flag
R
X
9
0
1
-
CY7C67300
Page 16 of 98
R
R/W
R
R/W
R/W
R/W
R/W
W
W
Zero
Flag
R/W
R
X
8
0
0
-
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