YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 747

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.3
The WDT has the following three registers. To prevent accidental overwriting, TCSR, TCNT, and
RSTCSR have to be written to in a method different from normal registers. For details, refer to
section 14.6.1, Notes on Register Access.
• Timer counter (TCNT)
• Timer control/status register (TCSR)
• Reset control/status register (RSTCSR)
14.3.1
TCNT is an 8-bit readable/writable up-counter. TCNT is initialized to H'00 when the TME bit in
TCSR is cleared to 0.
14.3.2
TCSR selects the clock source to be input to TCNT, and the timer mode.
Bit
7
Bit Name
OVF
Register Descriptions
Timer Counter (TCNT)
Timer Control/Status Register (TCSR)
Initial Value
0
R/W
R/(W) *
Description
Overflow Flag
Indicates that TCNT has overflowed in interval
timer mode. Only a write of 0 is permitted, to clear
the flag.
[Setting condition]
When TCNT overflows in interval timer mode
(changes from H'FF to H
When internal reset request generation is selected
in watchdog timer mode, OVF is cleared
automatically by the internal reset.
[Clearing conditions]
Cleared by reading TCSR when OVF = 1, then
writing 0 to OVF
Rev.7.00 Mar. 18, 2009 page 679 of 1136
Section 14 Watchdog Timer (WDT)
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00)
REJ09B0109-0700