YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 15

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Item
15.4.4 SCI
Initialization
(Asynchronous Mode)
15.6.2 SCI
Initialization (Clocked
Synchronous Mode)
Section 16 I
Interface 2 (IIC2)
(Option)
16.3.1 I
Register A (ICCRA)
Table 16.2 Transfer
Rate
2
C Bus Control
2
C Bus
Page
727
741
771
776
Revision (See Manual for Details)
Description added
Before transmitting and receiving data, you should first clear the
TE and RE bits in SCR to 0, then initialize the SCI as shown in
figure 15.5. Do not write to SMR, SCMR, IrCR, or SEMR while
the SCI is operating. This also applies to writing the same data
as the current register contents. …
Description added
Before transmitting and receiving data, you should first clear the
TE and RE bits in SCR to 0, then initialize the SCI as described
in a sample flowchart in figure 15.15. Do not write to SMR,
SCMR, IrCR, or SEMR while the SCI is operating. This also
applies to writing the same data as the current register contents.
…
Description amended
The I
NXP Semiconductors I
standard and fast mode functions. The register configuration
that controls the I
Semiconductors configuration, however.
Table amended
Notes 3 and 4 added
3. I
4. Due to load conditions, etc., it may not be possible to attain
Bit 3
CKS3 CKS2 CKS1 CKS0 Clock
0*
4
kHz, fast mode: max. 400 kHz).
the specified transfer rate when CKS3 and CKS2 are both
cleared to 0 (bit period: 7.5 tcyc) and the operating
frequency is 20 MHz or higher. Use a bit period other than
7.5 tcyc when the operating frequency exceeds 20 MHz.
Bit 2
0*
2
2
C bus interface specification (standard mode: max. 100
4
C bus interface conforms to and provides a subset of the
Bit 1
0
1
Bit 0
0
1
0
1
φ/28
φ/40
φ/48
φ/64
2
C bus differs partly from the NXP
φ =
8 MHz
286 kHz
200 kHz
167 kHz
125 kHz
2
C bus (inter-IC bus) interface (Rev. 3)
Rev.7.00 Mar. 18, 2009 page xiii of lxvi
φ =
10 MHz
357 kHz
250 kHz
208 kHz
156 kHz
φ =
20 MHz
714 kHz*
500 kHz*
417 kHz*
313 kHz
3
3
3
Transfer Rate
φ =
25 MHz
893 kHz*
625 kHz*
521 kHz*
391 kHz
3
3
3
φ =
33 MHz
1179 kHz*
825 kHz*
688 kHz*
516 kHz*
REJ09B0109-0700
3
3
3
3
φ =
34 MHz*
1214 kHz*
850 kHz*
708 kHz*
531 kHz*
1
3
3
3
3
φ =
35 MHz*
1250 kHz*
875 kHz*
729 kHz*
547 kHz*
2
3
3
3
3