YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 1042

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 24 Power-Down Modes
generated. Software standby mode cannot be cleared if the interrupt has been masked on the CPU
side or has been designated as a DTC activation source.
Clearing with the RES Pin:
When the RES pin is driven low, clock oscillation is started. At the same time as clock oscillation
starts, clocks are supplied to the entire LSI. Note that the RES pin must be held low until clock
oscillation stabilizes. When the RES pin goes high, the CPU begins reset exception handling.
Clearing with the STBY Pin:
When the STBY pin is driven low, a transition is made to hardware standby mode.
Setting Oscillation Stabilization Time after Clearing Software Standby Mode: Bits STS3 to
STS0 in SBYCR should be set as described below.
Using a Crystal Resonator:
Set bits STS3 to STS0 so that the standby time is more than the oscillation stabilization time.
Table 24.2 shows the standby times for operating frequencies and settings of bits STS3 to STS0.
Using an External Clock:
A PLL circuit stabilization time is necessary. Refer to table 24.2 to set the wait time.
Rev.7.00 Mar. 18, 2009 page 974 of 1136
REJ09B0109-0700