YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 620

KIT DEV EVAL H8S/2378 LCD

YLCDRSK2378

Manufacturer Part Number
YLCDRSK2378
Description
KIT DEV EVAL H8S/2378 LCD
Manufacturer
Renesas Electronics America
Series
H8®r
Datasheet

Specifications of YLCDRSK2378

Main Purpose
Displays, LCD Controller
Embedded
Yes, MCU, 16-Bit
Utilized Ic / Part
YLCDRSK2378
Primary Attributes
5.7" QVGA, Touch Screen
Secondary Attributes
Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 11 16-Bit Timer Pulse Unit (TPU)
11.3.1
The TCR registers control the TCNT operation for each channel. The TPU has a total of six TCR
registers, one for each channel. TCR register settings should be made only when TCNT operation
is stopped.
Bit
7
6
5
4
3
2
1
0
Rev.7.00 Mar. 18, 2009 page 552 of 1136
REJ09B0109-0700
Bit Name
CCLR2
CCLR1
CCLR0
CKEG1
CKEG0
TPSC2
TPSC1
TPSC0
Timer Control Register (TCR)
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Counter Clear 2 to 0
These bits select the TCNT counter clearing
source. See tables 11.3 and 11.4 for details.
Clock Edge 1 and 0
These bits select the input clock edge. When the
input clock is counted using both edges, the input
clock period is halved (e.g. φ/4 both edges = φ/2
rising edge). If phase counting mode is used on
channels 1, 2, 4, and 5, this setting is ignored and
the phase counting mode setting has priority.
Internal clock edge selection is valid when the input
clock is φ/4 or slower. This setting is ignored if the
input clock is φ/1, or when overflow/underflow of
another channel is selected.
00: Count at rising edge
01: Count at falling edge
1×: Count at both edges
Legend: ×: Don’t care
Time Prescaler 2 to 0
These bits select the TCNT counter clock. The
clock source can be selected independently for
each channel. See tables 11.5 to 11.10 for details.

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