YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 415

Manufacturer Part Number

KIT DEV EVAL H8S/2378 LCD

Manufacturer

Renesas Electronics America

Main Purpose

Displays, LCD Controller

Yes, MCU, 16-Bit

Utilized Ic / Part

Primary Attributes

5.7" QVGA, Touch Screen

Secondary Attributes

Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Figure 7.33 shows an example of single address transfer using the write data buffer function. In

this example, the CPU program area is in on-chip memory.

When the write data buffer function is activated, the DMAC recognizes that the bus cycle

concerned has ended, and starts the next operation. Therefore, DREQ pin sampling is started one

state after the start of the DMA write cycle or single address transfer.

The DMAC channel priority order is: channel 0 > channel 1, and channel A > channel B. Table

7.11 summarizes the priority order for DMAC channels.

Table 7.11 DMAC Channel Priority Order

Short Address Mode

Figure 7.33 Example of Single Address Transfer Using Write Data Buffer Function

Internal read signal

External address

Internal address

Multi-Channel Operation

Full Address Mode

Rev.7.00 Mar. 18, 2009 page 347 of 1136

Section 7 DMA Controller (DMAC)

REJ09B0109-0700