YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 417

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.5.13
When the DMAC accesses external space, contention with a refresh cycle, EXDMAC cycle, or
external bus release cycle may arise. In this case, the bus controller will suspend the transfer and
insert a refresh cycle, EXDMAC cycle, or external bus release cycle, in accordance with the
external bus priority order, even if the DMAC is executing a burst transfer or block transfer. (An
external access by the DTC or CPU, which has a lower priority than the DMAC, is not executed
until the DMAC releases the external bus.)
When the DMAC transfer mode is dual address mode, the DMAC releases the external bus after
an external write cycle. The external read cycle and external write cycle are inseparable, and so the
bus cannot be released between these two cycles.
When the DMAC accesses internal space (on-chip memory or an internal I/O register), the DMAC
cycle may be executed at the same time as a refresh cycle, EXDMAC cycle, or external bus
release cycle.
Relation between DMAC and External Bus Requests, Refresh Cycles,
and EXDMAC
Rev.7.00 Mar. 18, 2009 page 349 of 1136
Section 7 DMA Controller (DMAC)
REJ09B0109-0700