YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 500

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 9 Data Transfer Controller (DTC)
9.3
The DTC operates when activated by an interrupt or by a write to DTVECR by software. An
interrupt request can be directed to the CPU or DTC, as designated by the corresponding DTCER
bit. At the end of a data transfer (or the last consecutive transfer in the case of chain transfer), the
activation source or corresponding DTCER bit is cleared. The activation source flag, in the case
of RXI0, for example, is the RDRF flag of SCI_0.
When an interrupt has been designated a DTC activation source, existing CPU mask level and
interrupt controller priorities have no effect. If there is more than one activation source at the same
time, the DTC operates in accordance with the default priorities.
Table 9.1 shows a relationship between activation sources and DTCER clear conditions. Figure
9.2 shows a block diagram of activation source control. For details see section 5, Interrupt
Controller.
Table 9.1
Activation Source
Activation by software
Activation by an interrupt
Rev.7.00 Mar. 18, 2009 page 432 of 1136
REJ09B0109-0700
Activation Sources
Relationship between Activation Sources and DTCER Clearing
DISEL = 0 and Specified
Number of Transfers Has
Not Ended
SWDTE bit is cleared to 0
•
•
Corresponding DTCER bit
remains set to 1.
Activation source flag is
cleared to 0.
DISEL = 1 or Specified Number
of Transfers Has Ended
•
•
•
•
•
SWDTE bit remains set to 1
Interrupt request to CPU
Corresponding DTCER bit is
cleared to 0.
Activation source flag remains
set to 1.
Interrupt that became the
activation source is requested
to the CPU.