YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 41

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.2 Input/Output Pins ............................................................................................................... 870
21.3 Register Descriptions ......................................................................................................... 871
21.4 On-Board Programming Mode .......................................................................................... 891
21.5 Protection ........................................................................................................................... 920
21.6 Switching between User MAT and User Boot MAT ......................................................... 923
21.7 Programmer Mode ............................................................................................................. 924
21.8 Serial Communication Interface Specification for Boot Mode .......................................... 924
21.9 Usage Notes ....................................................................................................................... 952
Section 22 Masked ROM...................................................................................953
Section 23 Clock Pulse Generator .....................................................................955
23.1 Register Descriptions ......................................................................................................... 955
23.2 Oscillator............................................................................................................................ 958
23.3 PLL Circuit ........................................................................................................................ 961
23.4 Frequency Divider.............................................................................................................. 961
23.5 Usage Notes ....................................................................................................................... 962
21.1.1 Operating Mode .................................................................................................... 864
21.1.2 Mode Comparison................................................................................................. 865
21.1.3 Flash MAT Configuration..................................................................................... 866
21.1.4 Block Division ...................................................................................................... 867
21.1.5 Programming/Erasing Interface ............................................................................ 868
21.3.1 Programming/Erasing Interface Register .............................................................. 872
21.3.2 Programming/Erasing Interface Parameter ........................................................... 879
21.3.3 Flash Vector Address Control Register (FVACR)................................................ 889
21.4.1 Boot Mode ............................................................................................................ 891
21.4.2 User Program Mode.............................................................................................. 895
21.4.3 User Boot Mode.................................................................................................... 906
21.4.4 Procedure Program and Storable Area for Programming Data ............................. 910
21.5.1 Hardware Protection ............................................................................................. 920
21.5.2 Software Protection............................................................................................... 921
21.5.3 Error Protection..................................................................................................... 921
23.1.1 System Clock Control Register (SCKCR) ............................................................ 955
23.1.2 PLL Control Register (PLLCR) ............................................................................ 957
23.2.1 Connecting a Crystal Resonator............................................................................ 958
23.2.2 External Clock Input ............................................................................................. 959
23.5.1 Notes on Clock Pulse Generator ........................................................................... 962
23.5.2 Notes on Resonator ............................................................................................... 962
23.5.3 Notes on Board Design ......................................................................................... 963
Rev.7.00 Mar. 18, 2009 page xxxix of lxvi
REJ09B0109-0700