YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 290

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 6 Bus Controller (BSC)
6.7.7
CAS latency is controlled by settings of the W22 to W20 bits of WTCRB. Set the CAS latency
count, as shown in table 6.10, by the setting of synchronous DRAM. Depending on the setting, the
CAS latency control cycle (T
AST2 bit of ASTCR. Figure 6.45 shows the CAS latency control timing when synchronous
DRAM of CAS latency 3 is connected.
The initial value of W22 to W20 is H'7. Set the register according to the CAS latency of
synchronous DRAM to be connected.
Table 6.10 Setting CAS Latency
W22
0
1
Rev.7.00 Mar. 18, 2009 page 222 of 1136
REJ09B0109-0700
CAS Latency Control
W21
0
1
0
1
W20
0
1
0
1
0
1
0
1
c1
Description
Connect synchronous DRAM of CAS
latency 1
Connect synchronous DRAM of CAS
latency 2
Connect synchronous DRAM of CAS
latency 3
Connect synchronous DRAM of CAS
latency 4
Reserved (must not used)
Reserved (must not used)
Reserved (must not used)
Reserved (must not used)
) is inserted. WTCRB can be set regardless of the setting of the
CAS Latency Control
Cycle Inserted
0 state
1 state
2 states
3 states
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