YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 491

KIT DEV EVAL H8S/2378 LCD

YLCDRSK2378

Manufacturer Part Number
YLCDRSK2378
Description
KIT DEV EVAL H8S/2378 LCD
Manufacturer
Renesas Electronics America
Series
H8®r
Datasheet

Specifications of YLCDRSK2378

Main Purpose
Displays, LCD Controller
Embedded
Yes, MCU, 16-Bit
Utilized Ic / Part
YLCDRSK2378
Primary Attributes
5.7" QVGA, Touch Screen
Secondary Attributes
Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8.6.4
At the start of activation source acceptance, low level sensing is used for both falling edge sensing
and low level sensing on the EDREQ pin. Therefore, a request is accepted in the case of a low
level at the EDREQ pin that occurs before execution of the EDMDR write for setting the transfer-
enabled state.
When the EXDMAC is activated, make sure, if necessary, that a low level does not remain at the
EDREQ pin from the previous end of transfer, etc.
8.6.5
When transfer is started while the IRF bit is set to 1 in EDMDR, if the EDIE bit is set to 1 in
EDMDR together with the EDA bit in EDMDR, enabling interrupt requests, an interrupt will be
requested since EDIE = 1 and IRF = 1. To prevent the occurrence of an erroneous interrupt request
when transfer starts, ensure that the IRF bit is cleared to 0 before the EDIE bit is set to 1.
8.6.6
If the last EXDMAC transfer cycle and a CBR refresh cycle occur simultaneously, note that
although the CBR refresh and the last transfer cycle may be executed consecutively, ETEND may
also go low in this case for the refresh cycle.
Activation Source Acceptance
Enabling Interrupt Requests when IRF = 1 in EDMDR
ETEND Pin and CBR Refresh Cycle
Rev.7.00 Mar. 18, 2009 page 423 of 1136
Section 8 EXDMA Controller (EXDMAC)
REJ09B0109-0700

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