YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 265

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

If a row address hold time or read access time is necessary, making a setting in bits RCD1 and
RCD0 in DRACCR allows from one to three T
maintained, to be inserted between the T
cycle, in which the column address is output. Use the setting that gives the optimum row address
signal hold time relative to the falling edge of the RAS signal according to the DRAM connected
and the operating frequency of this LSI. Figure 6.24 shows an example of the timing when one T
state is set.
Read
Write
Note: n = 2 to 5
Figure 6.24 Example of Timing with One Row Address Output Maintenance State
φ
Address bus
RASn (CSn)
UCAS, LCAS
WE (HWR)
OE (RD)
Data bus
WE (HWR)
OE (RD)
Data bus
T
p
(RAST = 0, CAST = 0)
Row address
r
cycle, in which the RAS signal goes low, and the T
T
r
rw
states, in which row address output is
Rev.7.00 Mar. 18, 2009 page 197 of 1136
T
rw
Section 6 Bus Controller (BSC)
High
High
T
Column address
c1
REJ09B0109-0700
T
c2
c1
rw