YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 1050

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 25 List of Registers
Register Name
DTC mode register A
DTC source address register
DTC mode register B
DTC destination address register
DTC transfer count register A
DTC transfer count register B
I
I
I
I
I
Slave address register_0
I
I
I
I
I
I
I
Slave address register_1
I
I
Serial expansion mode register_2
EXDMA source address register_2
EXDMA destination address register_2 EDDAR_2
EXDMA transfer count register_2
EXDMA mode control register_2
EXDMA address control register_2
EXDMA source address register_3
EXDMA destination address register_3 EDDAR_3
Rev.7.00 Mar. 18, 2009 page 982 of 1136
REJ09B0109-0700
2
2
2
2
2
2
2
2
2
2
2
2
2
2
C bus control register A_0
C bus control register B_0
C bus mode register_0
C bus interrupt enable register_0
C bus status register_0
C transfer data register_0
C receive data register_0
C bus control register A_1
C bus control register B_1
C bus mode register_1
C bus interrupt enable register_1
C bus status register_1
C transfer data register_1
C receive data register_1
Abbrevia-
tion
MRA
MRB
DAR
CRA
CRB
ICCRA_0
ICCRB_0
ICMR_0
ICIER_0
ICSR_0
SAR_0
ICDRR_0
ICCRA_1
ICCRB_1
ICMR_1
ICIER_1
ICSR_1
SAR_1
ICDRR_1
SEMR_2
EDSAR_2
EDTCR_2
EDMDR_2
EDACR_2
EDSAR_3
SAR
ICDRT_0
ICDRT_1
Number
of Bits
8
24
8
24
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
32
32
32
16
16
32
32
Address Module
H'BC00 to DTC
H'BFFF
H'FD58
H'FD59
H'FD5A
H'FD5B
H'FD5C
H'FD5D
H'FD5E
H'FD5F
H'FD60
H'FD61
H'FD62
H'FD63
H'FD64
H'FD65
H'FD66
H'FD67
H'FDA8
H'FDE0
H'FDE4
H'FDE8
H'FDEC
H'FDEE
H'FDF0
H'FDF4
DTC
DTC
DTC
DTC
DTC
IIC2_0
IIC2_0
IIC2_0
IIC2_0
IIC2_0
IIC2_0
IIC2_0
IIC2_0
IIC2_1
IIC2_1
IIC2_1
IIC2_1
IIC2_1
IIC2_1
IIC2_1
IIC2_1
SCI_2
EXDMAC_2 *
EXDMAC_2 *
EXDMAC_2 *
EXDMAC_2 *
EXDMAC_2 *
EXDMAC_3 *
EXDMAC_3 *
3
3
3
3
3
3
3
Data
Width
16/32
16/32
16/32
16/32
16/32
16/32
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
16
16
16
16
16
16
16
Access
States
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2