TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 682

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

22.2
Operation Mode
22.2.10.5
sible acknowledge responses to the received data. The upper four bits of the acknowledge response are
equal to those of the command being executed. The 3rd bit indicates a receive error. The 0th bit indicates
an invalid command error, a checksum error or a password error. The 1st bit and 2nd bit are always "0". Re-
ceive error checking is not done in I/O Interface mode.
The boot program represents processing states with specific codes. Table 22-10 to show the values of pos-
Note:In the UART mode, if the baud rate setting cannot be set, the communication is stopped with-
Note:The upper four bits of the ACK response are the same as those of the previous command
Note:The upper four bits of the ACK response are the same as those of the operation command
Table 22-10 ACK Response to the Serial Operation Mode Byte
Table 22-11 ACK Response to the Command Byte
Table 22-12 ACK Response to the Checksum Byte
Table 22-13 ACK Response to Chip and Protection Bit Erase Byte
Acknowledge Responses
Return Value
Return Value
Return Value
Return Value
(See note)
(See note)
(See note)
(See note)
(See note)
out any response.
code.
code. For example, it is 1 (N ; RAM transfer command data [7:4] ) when password error occurs.
0xN8
0xN1
0xN0
0x4C
0x86
0x30
0x?8
0x?1
0x10
0x20
0x30
0x40
0x54
0x4F
The SIO can be configured to operate in UART mode. (See Note)
The SIO can be configured to operate in I/O Interface mode.
A receive error occurred while receiving a command code.
An undefined command code was received. (Reception was completed normally.)
The RAM Transfer command was received.
The Show Flash Memory Sum command was received.
The Show Product Information command was received.
The Chip Erase command was received.
A receive error occurred.
A checksum or password error occurred.
The checksum was correct.
The Chip Erase enabling command was received.
The Chip Erase command was completed.
The Chip Erase command was abnormally completed.
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Meaning
Meaning
Meaning
Meaning
TMPM362F10FG