TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 603

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TMPM362F10FG

Manufacturer Part Number
TMPM362F10FG
Description
32BIT MICROCONTROLLER
Manufacturer
Toshiba
Series
TX03r
Datasheet

Specifications of TMPM362F10FG

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, Microwire, SIO, SPI, SSP, UART/USART
Peripherals
DMA, WDT
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b
Package / Case
144-LQFP
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Number Of I /o
-
Eeprom Size
-
Oscillator Type
-
Lead Free Status / Rohs Status
 Details
Other names
Q5704184A

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM362F10FG
Manufacturer:
Freescale
Quantity:
488
Part Number:
TMPM362F10FG(C)
Manufacturer:
Toshiba
Quantity:
10 000
20.3.3
31-8
7-4
3
2-0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
(Example : If fc = 64MHz)
1100 (128 conversion clock)
1101 (512 conversion clock)
1001 (16 conversion clock)
1010 (24 conversion clock)
1011 (32 conversion clock)
0011 (64 conversion clock)
1000 (8 conversion clock)
TSH[3:0]
ADCLK[2:0]
A clock count required for conversion is 46 clocks at the minimum.
Examples of sample hold time and conversion time as shown as below.
Bit Symbol
ADCLK (Conversion Clock Setting Register)
<TSH[3:0]>
31
23
15
0
0
0
7
1
-
-
-
R
R/W
R
R/W
Type
30
22
14
0
0
0
6
0
Read as "0".
Select the AD sample hold time.
1000: 8 conversion clock
1001: 16 conversion clock
1010: 24 conversion clock
1011: 32 conversion clock
0011: 64 conversion clock
1100: 128 conversion clock
1101: 512 conversion clock
Others : Reserved
Read as "0".
Select the AD conversion clock
000: fc
001: fc/2
010: fc/4
011: fc/8
100: fc/16
Others : Reserved
-
-
-
Sample hold time
0.125 μs
0.375 μs
0.25 μs
0.5 μs
1.0 μs
2.0 μs
8.0 μs
TSH
29
21
13
0
0
0
5
0
-
-
-
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
000 (fc)
Page 579
28
20
12
0
0
0
4
0
-
-
-
001 (fc/2)
17.19μs
Conversion time(<ADCLK[2:0]> setting)
1.44μs
1.69μs
1.94μs
2.19μs
3.19μs
5.19μs
27
19
11
Function
0
0
0
3
0
-
-
-
-
010 (fc/4)
10.38μs
34.38μs
2.88μs
3.38μs
3.88μs
4.38μs
6.38μs
26
18
10
0
0
0
2
0
-
-
-
011 (fc/8)
12.75μs
20.75μs
68.75μs
5.75μs
6.75μs
7.75μs
8.75μs
ADCLK
25
17
0
0
9
0
1
0
-
-
-
TMPM362F10FG
100 (fc/16)
137.5μs
11.5μs
13.5μs
15.5μs
17.5μs
25.5μs
41.5μs
24
16
0
0
8
0
0
0
-
-
-

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