TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 650

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

22.2
Operation Mode
22.2
mode are the programmable modes. These two modes, the User Boot mode and the Single Boot mode, are refer-
red to as "Onboard Programming" modes where onboard rewriting of internal flash memory can be made on the us-
er's set.
BOOT (PI0) pin while the device is in reset status.
This device has three operation modes including the mode not to use the internal flash memory.
Among the flash memory operation modes listed in the above table, the User Boot mode and the Single Boot
Either the Single Chip or Single Boot operation mode can be selected by externally setting the level of the
Operation Mode
Table 22-1 Operation modes
Single chip mode
Single boot mode
Normal mode
User boot mode
Operation mode
Normal mode
Single chip mode
Table 22-2 Operating Mode Setting
Single chip mode
Single boot mode
User to set the
switch method
Figure 22-2 Mode Transition Diagram
Operation mode
After reset is cleared, it starts up from the internal flash memory.
In this operation mode, two different modes, i.e., the mode to execute user application
programs and the mode to rewrite the flash memory onboard the user’s set, are de-
fined.The former is referred to as "normal mode" and the latter "user boot mode".
A user can uniquely configure the system to switch between these two modes. For exam-
ple, a user can freely design the system such that the normal mode is selected when
the port "A0" is set to "1" and the user boot mode is selected when it is set to "0". A
user should prepare a routine as part of the application program to make the decision
on the selection of the modes.
After reset is cleared, it starts up from the internal Boot ROM (Mask ROM). In the Boot
ROM, an algorithm to enable flash memory rewriting on the user’s set through the seri-
al port of this device is programmed. By connecting to an external host computer
through the serial port, the internal flash memory can be programmed by transferring da-
ta in accordance with predefined protocols.
boot mode
User
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RESET
0 → 1
0 → 1
Operation details
programming mode
Pin
Onboard
boot mode
BOOT (PI0)
Single
1
0
Reset state
TMPM362F10FG