TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 339

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TMPM362F10FG

Manufacturer Part Number
TMPM362F10FG
Description
32BIT MICROCONTROLLER
Manufacturer
Toshiba
Series
TX03r
Datasheet

Specifications of TMPM362F10FG

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, Microwire, SIO, SPI, SSP, UART/USART
Peripherals
DMA, WDT
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b
Package / Case
144-LQFP
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Number Of I /o
-
Eeprom Size
-
Oscillator Type
-
Lead Free Status / Rohs Status
 Details
Other names
Q5704184A

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM362F10FG
Manufacturer:
Freescale
Quantity:
488
Part Number:
TMPM362F10FG(C)
Manufacturer:
Toshiba
Quantity:
10 000
10.3.13
31-24
23-16
15-12
11
10-6
5-3
2
1-0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
address_match
[7:0]
adv
rd_bl[2:0]
mw[1:0]
Bit Symbol
Note:Do not access the external memory area except set CS area.
smc_opmode0_2 (SMC Opmode Registers 0<2>)
Undefined
Undefined
31
23
15
0
1
7
-
-
-
R
R
R
R
R
R
R
R
Type
Undefined
Undefined
30
22
14
1
1
6
Start address of CS2 area
Read as "0x62".
Read as "0xFF".
Read as undefined.
Address latch enable signal
0 : Address latch enable signal (ALE) not used
1 : Address latch enable signal (ALE) used
Read as undefined.
Burst length of data read
000 : 1 beat
001 : 4 beats
010 to 111 : Don't care
Read as undefined.
Data bus width of CS2
01 : 16 bits
Others : Don't care
-
-
-
Undefined
29
21
13
1
1
5
0
-
-
Page 315
Undefined
rd_bl
28
20
12
0
1
4
0
-
-
address_match
adv
27
19
11
Function
0
1
1
3
0
-
Undefined
Undefined
26
18
10
0
1
2
-
-
-
Undefined
25
17
1
1
9
1
1
-
-
TMPM362F10FG
mw
Undefined
24
16
0
1
8
0
0
-
-

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