TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 666

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

22.2
Operation Mode
22.2.7
22.2.8
22.2.9
eration mode. In conjunction with this section, refer to "22.2.10 Operation of Boot Program".
tion with Chapter "22.2.10 Operation of Boot Program".
Table 22-4, Table 22-6 to Table 22-9 illustrate the operation commands and data transfer formats at each op-
Single Boot Mode places restrictions on the internal RAM and ROM as shown in Table 22-5.
The following tables shows the transfer format for each Boot program command. Use this section in conjunc-
Data Transfer Format
Restrictions on internal memories
Transfer Format for Boot Program
Table 22-5 Restrictions in Single Boot Mode
Internal ROM
Internal RAM
Memory
Table 22-4 Single Boot Mode Commands
Code
0x10
0x20
0x30
0x40
A program contained in the BOOT ROM uses the area, through 0x2000_0000 to
0x2000_03FF, as a work area.
Store the RAM transfer program from 0x2000_0400 through the end address of RAM.
The following addresses are assigned for storing software ID information and passwords.
Storing program in these addresses is not recommendable.
0x3F8F_FFF0 to 0x3F8F_FFFF
Page 642
Chip and protection bit erase
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Details
RAM transfer
Command
TMPM362F10FG