TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 663

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

22.2.4
22.2.5
TMPM362F10FG
Product Name
figuration shown below.
SET pin (high).
mode, the internal flash memory is mapped to 0x3F80_0000 and later addresses, and the Internal boot ROM
(Mask ROM) is mapped to 0x0000_0000 through 0x0000_0FFF.
To execute the on-board programming, boot the TMPM362F10FG with Single Boot mode following the con-
Set the RESET input to "0", and set the each BOOT (PI0) pins to values shown above, and then release RE-
Figure 22-3 shows a comparison of the memory maps in Normal and Single Boot modes. In Single Boot
The internal flash memory and RAM addresses of each device are shown below.
Configuration for Single Boot Mode
Memory Map
(6)
ble between the host and the target board. Turn on the power again so that the TMPM362F10FG re-
boots in Single-Chip (Normal) mode to execute the new program.
When programming of the flash memory is complete, power off the board and disconnect the ca-
Step-6
Flash Size
1024 KB
(
TMPM362F10FG
Boot ROM
New Application
Program Code
flash memory
RAM Size
64 KB
)
BOOT(PI0) = 0
RESET = 0 → 1
(Single Chip / Single Boot Mode)
0x3F80_0000 to 0x3F8F_FFFF
0x0000_0000 to 0x000F_FFFF
Page 639
(I/O)
Flash Address
SIO4
RAM
(Host)
0 → 1 RESET
Set to Single-Chip
mode
(BOOT=1)
0x2000_0000 to 0x2000_FFFF
RAM Address
TMPM362F10FG