DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 908

• Manufacturer Part Number: DF2367VF33
• Description: MCU 3V 384K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2367VF33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2367VF33; HD64F2367VF33

Section 24 List of Registers
Register Name
Timer control/status register
Timer counter
Reset control/status register
Timer start register
Timer synchronous register
Flash code control status register
Flash program code select register
Flash erase code select register
Flash memory control register 1
Flash key code register
Flash memory control register 2
Flash MAT select register
Flash transfer destination address
register
Erase block register 1
Erase block register 2
Flash vector address control register
Timer control register_0
Timer mode register_0
Timer I/O control register H_0
Timer I/O control register L_0
Timer interrupt enable register_0
Timer status register_0
Timer counter_0
Timer general register A_0
Timer general register B_0
Rev.6.00 Mar. 18, 2009 Page 848 of 980
REJ09B0050-0600
Abbrevia-
tion
TCSR_0
TCNT
RSTCSR
TSTR
TSYR
FCCS *
FPCS *
FECS *
FLMCR1
FKEY *
FLMCR2
FMATS *
FTDAR *
EBR1
EBR2
FVACR *
TCR_0
TMDR_0
TIORH_0
TIORL_0
TIER_0
TSR_0
TCNT_0
TGRA_0
TGRB_0
3
3
3
3
3
3
3
Bit No. Address Module
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
16
16
16
H'FFBC *
(Write)
H'FFBC
(Read)
H'FFBC *
(Write)
H'FFBD
(Read)
H'FFBE *
(Write)
H'FFBF
(Read)
H'FFC0
H'FFC1
H'FFC4 *
H'FFC5 *
H'FFC6 *
H'FFC8
H'FFC8
H'FFC9
H'FFC9
H'FFCA
H'FFCA
H'FFCB
H'FFCB
H'FFD0
H'FFD1
H'FFD2
H'FFD3
H'FFD4
H'FFD5
H'FFD6
H'FFD8
H'FFDA
2
4
4
4
2
2
WDT
WDT
WDT
TPU
TPU
FLASH
FLASH
FLASH
FLASH
FLASH
FLASH
FLASH
FLASH
FLASH
FLASH
FLASH
TPU_0
TPU_0
TPU_0
TPU_0
TPU_0
TPU_0
TPU_0
TPU_0
TPU_0
Data
Width
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
16
16
16
16
16
16
16
16
16
Access
States
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2