DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 676

• Manufacturer Part Number: DF2367VF33
• Description: MCU 3V 384K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2367VF33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2367VF33; HD64F2367VF33

Section 14 Serial Communication Interface (SCI, IrDA)
14.8
When the IrDA function is enabled with bit IrE in IrCR, the SCI_0 TxD0 and RxD0 signals are
subjected to waveform encoding/decoding conforming to IrDA specification version 1.0 (IrTxD
and IrRxD pins). By connecting these pins to an infrared transceiver/receiver, it is possible to
implement infrared transmission/reception conforming to the IrDA specification version 1.0
system.
In the IrDA specification version 1.0 system, communication is started at a transfer rate of 9600
bps, and subsequently the transfer rate can be varied as necessary. As the IrDA interface in this
LSI does not include a function for varying the transfer rate automatically, the transfer rate setting
must be changed by software.
Figure 14.33 shows a block diagram of the IrDA function.
Transmission: In transmission, the output signal (UART frame) from the SCI is converted to an
IR frame by the IrDA interface (see figure 14.34).
When the serial data is 0, a high pulse of 3/16 the bit rate (interval equivalent to the width of one
bit) is output (initial value). The high-level pulse can be varied according to the setting of bits
IrCKS2 to IrCKS0 in IrCR.
Rev.6.00 Mar. 18, 2009 Page 616 of 980
REJ09B0050-0600
IrDA Operation
TxD0/IrTxD
RxD0/IrRxD
Figure 14.33 Block Diagram of IrDA
Pulse encoder
Pulse decoder
IrCR
IrDA
RxD
TxD
SCI0