DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 821

MCU 3V 384K 128-QFP

DF2367VF33

Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2367VF33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33

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16. Determine the FPFR (general-purpose register R0L) value returned by the programming
17. After programming finishes, clear FKEY and specify software protection.
⎯ Programming finished processing should be poerformed immediately after programming of
program.
If this LSI is restarted by a power-on reset immediately after user MAT programming has
finished, secure a reset period (period of RES = 0) that is at least as long as normal 100 μs.
Programming finished area
the necessary data has completed. Caution is necessary because if an operation such as
initialization processing, internal program downloading, rewriting an area of RAM that is a
download destination, or MAT switching is performed before programming finished
processing, programming will not take place correctly.
:
:
EB9
EB10
EB11
EB12
Before reprogramming erased blocks containing a programming
finished area (EB10 and EB11), the corresponding erased
blocks (EB10 and EB11) should be erased.
Section 20 Flash Memory (0.18-μm F-ZTAT Version)
Rev.6.00 Mar. 18, 2009 Page 761 of 980
REJ09B0050-0600

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