DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 807
![MCU 3V 384K 128-QFP](/photos/28/61/286109/128-bfqfp_sml.jpg)
DF2367VF33
Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2368VTE34V.pdf
(1044 pages)
Specifications of DF2367VF33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33
HD64F2367VF33
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20.3.3
FVACR modifies the space from which the vector table data of the NMI interrupts is read.
Normally the vector table data is read from the address spaces from H'00001C to H'00001F.
However, the vector table can be read from the on-chip RAM by the FVACR setting. FVACR is
initialized to H'00 at a power-on reset or in hardware standby mode.
All interrupts including NMI must be prohibited in the programming/erasing processing or during
downloading on-chip program. When the NMI interrupt is necessary, FVACR must be set and the
interrupt exception processing routine must be set in the on-chip RAM space or in the external
space.
Bit
7
6 to 4
3
2
1
0
Legend:
×: Don’t care
Bit
Name
FVCHGE 0
⎯
FVSEL3
FVSEL2
FVSEL1
FVSEL0
Flash Vector Address Control Register (FVACR)
Initial
Value
All 0
0
0
0
0
R/W
R/W
R
R/W
R/W
R/W
R/W
Description
Vector Switch Function Valid
Selects whether the function for modifying the space from
which the vector table data is read is valid or invalid.
When FVCHGE = 1, the vector table data can be read
from the on-chip RAM space.
0: Function for modifying the space from which the vector
1: Function for modifying the space from which the vector
Reserved
These bits are always read as 0. The write value should
always be 0.
Interrupt Source Select
The vector table of the NMI interrupt processing can be in
the on-chip RAM space by setting this bit.
0000: Vector table data is in area 0
0001: Setting prohibited
001×: Setting prohibited
01××: Setting prohibited
1000: Vector table data is in the on-chip RAM space
1001: Setting prohibited
101×: Setting prohibited
11××: Setting prohibited
table data is read is invalid (Initial value)
table data is read is valid
Section 20 Flash Memory (0.18-μm F-ZTAT Version)
(H'00001C to H'00001F)
(H'FFA01C to H'FFA01F)
Rev.6.00 Mar. 18, 2009 Page 747 of 980
REJ09B0050-0600
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