DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 287

MCU 3V 384K 128-QFP

DF2367VF33

Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2367VF33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
DF2367VF33WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit
12
11
10
9
8
Bit Name
SAE0
DTA1B
DTA1A
DTA0B
DTA0A
Initial Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Single Address Enable 0
Specifies whether channel 0B is to be used for
transfer in dual address mode or single address
mode. This bit is invalid in full address mode.
0: Dual address mode
1: Single address mode
Data Transfer Acknowledge 1B
Data Transfer Acknowledge 1A
Data Transfer Acknowledge 0B
Data Transfer Acknowledge 0A
These bits enable or disable clearing when DMA
transfer is performed for the internal interrupt
source selected by the DTF3 to DTF0 bits in
DMACR.
It the DTA bit is set to 1 when DTE = 1, the
internal interrupt source is cleared automatically
by DMA transfer. When DTE = 1 and DTA = 1,
the internal interrupt source does not issue an
interrupt request to the CPU or DTC.
If the DTA bit is cleared to 0 when DTE = 1, the
internal interrupt source is not cleared when a
transfer is performed, and can issue an interrupt
request to the CPU or DTC in parallel. In this
case, the interrupt source should be cleared by
the CPU or DTC transfer.
When DTE = 0, the internal interrupt source
issues an interrupt request to the CPU or DTC
regardless of the DTA bit setting.
Rev.6.00 Mar. 18, 2009 Page 227 of 980
Section 7 DMA Controller (DMAC)
REJ09B0050-0600

Related parts for DF2367VF33