DF2367VF33 Renesas Electronics America, DF2367VF33 Datasheet - Page 429

MCU 3V 384K 128-QFP

DF2367VF33

Manufacturer Part Number
DF2367VF33
Description
MCU 3V 384K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2367VF33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2367VF33
HD64F2367VF33

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9.8.7
PFCR1 performs I/O port control. Bits 7 to 5 are valid in modes 1 and 2 and all the bits are valid
in modes 4 and 7.
Bit
7
6
5
4
3
2
Bit Name
A23E
A22E
A21E
A20E
A19E
A18E
Port Function Control Register 1 (PFCR1)
Initial Value
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Address 23 Enable
Enables or disables output for address output 23
(A23).
0: DR output when PA7DDR = 1
1: A23 output when PA7DDR = 1
Address 22 Enable
Enables or disables output for address output 22
(A22).
0: DR output when PA6DDR = 1
1: A22 output when PA6DDR = 1
Address 21 Enable
Enables or disables output for address output 21
(A21).
0: DR output when PA5DDR = 1
1: A21 output when PA5DDR = 1
Address 20 Enable
Enables or disables output for address output 20
(A20).
0: DR output when PA4DDR = 1
1: A20 output when PA4DDR = 1
Address 19 Enable
Enables or disables output for address output 19
(A19).
0: DR output when PA3DDR = 1
1: A19 output when PA3DDR = 1
Address 18 Enable
Enables or disables output for address output 18
(A18).
0: DR output when PA2DDR = 1
1: A18 output when PA2DDR = 1
Rev.6.00 Mar. 18, 2009 Page 369 of 980
Section 9 I/O Ports
REJ09B0050-0600

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