peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 83

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

Transmit Signaling Controller
Similar to the receive signaling controller the same signaling method is provided. The
TE3-CHATT will perform the following signaling and data link methods on the DL-
channel of the ESF format:
In transmit and receive direction 64 byte deep FIFOs divided into two pages of 32 bytes
are provided for the intermediate storage of data between the HDLC machine and the
CPU interface.
Receive Signaling Controller
Each of the signaling controllers may be programmed to operate in various signaling
modes. The TE3-CHATT will perform the following signaling and data link methods on
the DL-Channel of the ESF format:
• HDLC/SDLC Access
• Transparent Access
• Bit Oriented Messages in ESF-DL Channel
Data Sheet
In case of common channel signaling the signaling procedure HDLC/SDLC will be
supported. The signaling controller of the TE3-CHATT performs the flag detection,
CRC checking, address comparison and zero bit-removing. Depending on the
selected address mode, the TE3-CHATT may perform a 1 or 2 byte address
recognition. If a 2-byte address field is selected, the high address byte is compared
with two individually programmable values in register RAH. Buffering of receive data
is done in the RFIFO. Refer also to
In signaling controller transparent mode, fully transparent data reception without
HDLC framing is performed, i.e. without flag recognition, CRC checking or bit-stuffing.
This allows the user specific protocol variations.
The TE3-CHATT supports the DL-channel protocol for ESF format according to ANSI
T1.403 specification or according to AT&T TR54016. The Bit Oriented Message
(BOM) receiver may be switched on/off separately. If the TE3-CHATT is used for
HDLC formats only, the BOM receiver has to be switched off. If BOM-receiver has
been switched on, an automatic switching between HDLC and BOM mode is enabled.
If eight or more consecutive ones are detected, the BOM mode is entered. Upon
detection of a flag in the data stream, the TE3-CHATT switches back to HDLC-mode.
In BOM-mode, the following byte format is assumed (the left most bit is received first).
111111110xxxxxx0
The TE3-CHATT uses the FF
RFIFO (first bit received: LSB) if it starts and ends with a ‘0’. Bytes starting or ending
with a ‘1’ are not stored. If there are no 8 consecutive one’s detected within 32 bits and
the TE3-CHATT is currently in the BOM mode, an interrupt is generated. However,
byte sampling is not stopped.
H
byte for synchronization, the next byte is stored in
Chapter
83
4.8.1.
Functional Description
PEB 3456 E
05.2001