peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 192

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

SBA
SPI
SPI Access Register
Access
Address
Reset Value
SPIS
SCMD
Data Sheet
31
15
0
0
0
: read/write
: 40
: 0000001F
SPI Start
To start the EEPROM transaction, which is defined in the SPI command,
the byte address, and the data field, this bit must be set to ‘1’ by a write
transaction through the PCI interface. After the transaction is finished,
the start bit is deasserted by the SPI interface controller. This signal must
be polled by system software.
SPI Command
In this register, the SPI command for the next EEPROM transfer must be
written before the transaction is started. The following SPI commands
are supported:
01
02
03
04
05
06
SPI Byte Address
For read and write transaction to the connected EEPROM, the byte
address must be written in this register before the transaction is started.
H
H
H
H
H
H
SBA(7:0)
0
H
WRSR
WRITE
READ
WRDI
RDSR
WREN
0
H
0
Write Status Register
Write Data to Memory Array
Read Data from Memory Array
Reset Write Enable Latch
Read Status Register
Set Write Enable Latch
0
SPIS
24
8
192
23
7
SCMD(7:0)
SWD(7:0)
Register Description
PEB 3456 E
05.2001
16
0