peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 120

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

• Unframed DS2
• Framed DS2
• Unframed DS1/E1
•
Figure 4-14 Test Unit Access Points
In pseudorandom test mode the receiver tries to achieve synchronization to a test
pattern which satisfies the programmed receiver polynomial. In fixed pattern mode it
synchronizes to a repetitive pattern with a programmable length. An all ’1’ pattern or an
all ’0’ pattern, which satisfies this condition, is flagged. Measurement intervals as well as
receiver synchronization can be controlled by the user. When a test is finished an
interrupt is generated and the bit count and the bit error count are readable.
4.10.3
In full payload rate format the DS3 multiframe structure can be selected according to the
M13 multiplex structure or the C-bit parity structure. In either case the data blocks [84]
carry one continuous data stream which is provided via the tributary interface one.
Multiplexing/Demultiplexing of the data block [84] does NOT apply.
4.11
The test unit of the TE3-CHATT incorporates a test pattern generator and a test pattern
synchronizer which can be attached to different test points as shown in Figure 4-14.
Controlled by a small set of registers it can generate and synchronize to polynomial
pseudorandom test patterns or repetitive fixed length test patterns.
Test patterns can be generated in the following modes:
• Framed DS3
Data Sheet
Framer
DS3
Full Payload Rate Format
Test Unit
(De)multi-
plexer
M23
0
Test Port
Select
6
DS2 Framer
DS2 Framer
DS2 Framer
120
0
Test Port
Select
6
M12
M12
0
Test Port
Functional Description
Select
27
Select
Mode
Test
PEB 3456 E
Test Unit
05.2001