peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 360

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

RCR1
Receive Channel Configuration Register 1
Address
RAH2
RAH1
RTF
8.9.6
Facility data link registers control the signalling channels of T1, E1 as well as the
signalling channels of the DS3 C-bit parity format (Path Maintenance Data Link and Far
End Alarm and Control Channel).
Access
Reset Value
Data Sheet
15
0
RAH2 RAH1
14
Facility Data Link Registers
13
: read/write
: 00
: 0000
Receive Address High Byte 2 Valid
This bit enables byte RAH.RAH2 for address comparison.
0
1
Receive Address High Byte 1 Valid
This bit enables byte RAH.RAH1 for address comparison.
0
1
RFIFO Threshold Level
This bit field sets the threshold of the receive FIFO and is applied to both
pages of the receive FIFO. A ’Receive Pool Full’ interrupt vector will be
generated, when the programmed threshold is reached. The threshold
value is given as follows:
00
01
10
11
B
B
B
B
12
RTF(1:0)
H
H
Disable
Enable
Disable
Enable
32 byte threshold
16 byte threshold
4 byte threshold
2 byte threshold
11
INV RIFTF BFE BRM BRAC RAL2 RAL1 XCRC
10
9
8
360
7
6
5
4
Register Description
3
CRC
DIS
2
PEB 3456 E
RON HDLC
1
05.2001
0