peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 249

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

MTIMER
Master Local Bus Timer Register
Access
Address
Reset Value
TIMER
WS
Data Sheet
15
: read/write
: 104
: 0000
Local Bus Latency Timer
TIMER*16 determines the time in clock cycles the TE3-CHATT holds the
local bus as bus master after it was granted the bus. It holds the bus as
long as the first transaction is in progress or the latency timer is counting.
In case that the TE3-CHATT shall release the bus after it each
transaction the latency TIMER value must be set to zero.
Wait State Timer
The value of this register determines the time in clock cycles the TE3-
CHATT asserts LRD, LWR (Intel Mode) respectively LDS (Motorola Bus
Mode). See also FCONF.WSE.
H
H
(PCI), 02
TIMER(15:4)
H
(Local Bus)
249
4
Register Description
3
WS(3:0)
PEB 3456 E
05.2001
0