peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 121

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

•
Figure 4-15 Pattern Generator
Bit Error Insertion
The test unit provides the optional capability to insert bit errors in the range of 10
error in 10.000.000 bits) up to 10
4.12
The TE3-CHATT contains a mailbox to allow communication between two intelligent
peripherals connected to the PCI bus and the local microprocessor bus. The mailbox is
organized in two pages of eight registers. The first page is used to store information from
the PCI side and to read the information from the local microprocessor side. The second
page is used for the opposite direction, from the local microprocessor side to the PCI
side. Each page consists of one status register and seven data registers.
The mailbox provides a ‘doorbell’ capability. In this case an interrupt vector can be
generated to inform the addressed intelligent peripheral that new information has been
stored in the mailbox. This interrupt vector will be generated on write accesses to the
status register of the selected page.
As an example, consider when the PCI host system wants to transfer data to an
intelligent peripheral. First it loads data into the mailbox data registers MBP2E1 through
MBP2E7, and then writes a status information to the mailbox status register MBP2E0.
This last action causes an interrupt vector to be written to the interrupt FIFO which is
connected to the local bus. The presence of an interrupt vector results in assertion of pin
LINT. The intelligent peripheral recognizes the interrupt pin asserted and reads the
interrupt vector out of the interrupt FIFO (which results in deassertion of pin LINT), and
then reads data from the mailbox data registers.
Data Sheet
Mailbox
N
X
Pattern length
Feedback Tap
0
1
-1
bit errors (1 error in 10 bits).
X-1
+
121
Pseudorandon pattern
X
Feedback in
mode only
N-2
N-1
Functional Description
insertion
Bit error
+
PEB 3456 E
05.2001
-7
(1